shtaxxx日記

コンピュータアーキテクチャについて研究している研究者の日記や技術紹介

DATE'11

DATE'11の気になる論文

5.4 Advanced NoC Tooling and Architectures
  • RUN-TIME DEADLOCK DETECTION IN NETWORKS-ON-CHIP USING COUPLED TRANSITIVE CLOSURE NETWORKS, R Al-Dujaily, T Mak, F Xia, A Yakovlev and M Palesi, Newcastle U, UK
  • A FULLY-SYNTHESIZABLE SINGLE-CYCLE INTERCONNECTION NETWORK FOR SHARED-L1 PROCESSOR CLUSTERS, I Loi, M R Kakoee and L Benini, DEIS – Bologna U, IT A Rahimi, UC San Diego, US
4.4 System Level Simulation and Validation
  • A SHARED-VARIABLE-BASED SYNCHRONIZATION APPROACH TO EFFICIENT CACHE COHERENCE SIMULATION FOR MULTI-CORE SYSTEMS, C-Y Fu, M-H Wu and R-S Tsay, National Tsing Hua U, Taiwan, ROC
  • CYCLE-COUNT-ACCURATE PROCESSOR MODELING FOR FAST AND ACCURATE SYSTEM-LEVEL SIMULATION, C-K Lo, L-C Chen, M-H Wu and R-S Tsay, National Tsing-Hua U, Taiwan, ROC

DATE'10の論文も

  • Multicore soft error rate stabilization using adaptive dual modular redundancy, Ramakrishna Vadlamani, Jia Zhao, Wayne Burleson and Russell Tessier Department of Electrical and Computer Engineering University of Massachusetts Amherst MA, United States